The present invention relates to a digital signal processor (DSP) system equipped with a programmable RAM (hereinafter referred to as PRAM) for storing program data, and a controlling method thereof.
A Digital Signal Processor (referred to hereinafter as a DSP) refers to a processor for executing digital signal processing. The same is a type of microprocessor in internal structure, with a hardware multiplier installed therein, having functions for specialized application in signal processing such as simultaneous execution of multiplication and addition, and so forth, to enable processing of product-sum operation heavily used in signal processing to be executed at high speed.
The DSP is capable of having processing functions of JAVA virtual machine (JAVA: registered trademark), MP3 playback machine, and so forth by processing not only a user interface (key manipulation and a display) formed in a cellular phone, and so on, but also a variety of programs from a PRAM, a ROM (Read Only Memory), an so on.
With the DSP of the above-described configuration, however, the DSP has to be in as-queued state until completion of downloading of a program in whole, so that a problem has been encountered in that much time is required before starting execution of the program.